Preliminary
PowerPC 405EP Embedded Processor Data Sheet
Recommended DC Operating Conditions (Part 2 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Notes:
1. PCI drivers meet PCI specifications.
2. See “5V-Tolerant Input Current” on page 41.
Parameter
Symbol
Minimum
+1.65
Typical
+1.8
Maximum
+1.95
Unit
V
Notes
AV
PLL Supply Voltage (133, 200, 266MHz)
PLL Supply Voltage (333MHz)
DD
AV
+1.7
+1.8
+1.9
V
DD
Input Logic High
(1.8V CMOS receivers)
V
0.65V
V
V
V
IH
DD
DD
Input Logic High
(3.3V PCI receivers)
V
0.5OV
OV +0.5
IH
DD
DD
Input Logic High
(3.3V LVTTL, 5V tolerant receivers)
V
+2.0
0
+5.5
V
IH
Input Logic Low
(1.8V CMOS receivers)
V
0.65V
V
IL
DD
Input Logic Low
(3.3V PCI receivers)
V
0.35OV
-0.5
0
V
IL
DD
Input Logic Low
(3.3V LVTTL, 5V tolerant receivers)
V
+0.8
V
IL
Output Logic High
(3.3V PCI receivers)
V
0.9OV
OV
V
OH
DD
DD
Output Logic High
(3.3V LVTTL, 5V tolerant receivers)
V
OV
+2.4
-0.5
0
V
OH
DD
Output Logic Low
(3.3V PCI receivers)
V
0.35OV
V
OL
DD
Output Logic Low
(3.3V LVTTL, 5V tolerant receivers)
V
+0.4
0
V
OL
Input Leakage Current
(no pull-up or pull-down)
I
0
µA
IL1
Input Leakage Current
(with internal pull-down)
I
0
200
µA
µA
V
IL2
I
5V Tolerant I/O Input Current
±10
-325
2
IL4
Input Max Allowable Overshoot
(1.8V CMOS receivers)
V
V
+ 0.6
DD
IMAO1.8
Input Max Allowable Overshoot
(3.3V LVTTL, 5V tolerant receivers)
V
+5.5
V
V
V
IMAO
Input Max Allowable Undershoot
(3.3V LVTTL, 5V tolerant receivers)
V
-0.6
IMAU
Output Max Allowable Overshoot
(3.3V LVTTL, 5V tolerant receivers)
V
+5.5
+85
OMAO
Output Max Allowable Undershoot
(3.3V LVTTL, 5V tolerant receivers)
V
-0.6
-40
V
OMAU
T
Case Temperature
°C
C
Page 40 of 52
6/9/03
IBM [ IBM ]
