OVdd
R
N
SW2
Pad
Data
SW1
R
P
GND
Figure 18. Driver Impedance Measurement
Table 18 su m m arizes th e im pedan ce a board design er wou ld design to for a typical
process. Th ese valu es were derived by sim u lation at 65C. As th e process im proves, th e
ou tpu t im pedan ce will be lower by several oh m s th an th is typical valu e.
Table 18. Impedance Characteristics
Operating conditions are specified in Section Table 2., "Recommended Operating Conditions"
Process
60x
L2
Symbol
Unit
Typical
43
38
Z
Ω
0
35 of 44
PPC740 and PPC750 Hardware Specifications
Preliminary and subject to change without notice