2.0 Features
Th is section su m m arizes featu res of th e PPC740’s an d PPC750’s im plem en tation of th e
PowerPC arch itectu re. Major featu res are as follows:
•· Bran ch processin g u n it
-- Fou r in stru ction s fetch ed per clock
-- On e bran ch processed per cycle (plu s resolvin g 2 specu lation s)
-- Up to 1 specu lative stream in execu tion , 1 addition al specu lative stream in
fetch
-- 512-en try bran ch h istory table (BHT) for dyn am ic prediction
-- 64-en try, 4-way set associative bran ch target in stru ction cach e (BTIC) for
elim in atin g bran ch delay slots
•· Dispatch u n it
-- Fu ll h ardware detection of depen den cies (resolved in th e execu tion u n its)
-- Dispatch two in stru ction s to six in depen den t u n its (system , bran ch ,
load/ store, fixed-poin t u n it 1, fixed-poin t u n it 2, or floatin g-poin t)
-- Serialization con trol (predispose, post dispatch , execu tion , serialization )
•· Decode
-- Register file access
-- Forwardin g con trol
-- Partial in stru ction decode
•· Load/ store u n it
-- On e cycle load or store cach e access (byte, h alf-word, word, dou ble-word)
-- Effective address gen eration
-- Hits u n der m isses (on e ou tstan din g m iss)
-- Sin gle-cycle m isalign ed access with in dou ble word bou n dary
-- Align m en t, zero paddin g, sign exten d for in teger register file
-- Floatin g-poin t in tern al form at con version (align m en t, n orm alization )
-- Sequ en cin g for load/ store m u ltiples an d strin g operation s
-- Store gath erin g
-- Cach e an d TLB in stru ction s
-- Big- an d little-en dian byte addressin g su pported
-- Misalign ed little-en dian su pport in h ardware
•· Fixed-poin t u n its
-- Fixed-poin t u n it 1 (FXU1); m u ltiply, divide, sh ift, rotate, arith m etic, logical
-- Fixed-poin t u n it 2 (FXU2); sh ift, rotate, arith m etic, logical
-- Sin gle-cycle arith m etic, sh ift, rotate, logical
-- Mu ltiply an d divide su pport (m u lti-cycle)
-- Early ou t m u ltiply
•· Floatin g-poin t u n it
-- Su pport for IEEE-754 stan dard sin gle- an d dou ble-precision floatin g-poin t
PPC740 and PPC750 Hardware Specifications
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Preliminary and subject to change without notice