IBM11D1475B IBM11D2475B
IBM11E1475B IBM11E2475B
1M/2M x 32 Desktop ECC-on-SIMM
Write Cycle (Early Write)
tRC
tRAS
tRP
VIH
RAS
VIL
tCSH
tCRP
tRCD
tRSH
VIH
tCAS
CAS
VIL
tRAD
tASR
tASC
tRAH
tCAH
VIH
Address
Row
tWRH
Column
VIL
tWRP
tWCS
tWCH
VIH
VIL
tWP
WE
NOTE 1
tDS
tDH
VIH
VIL
DIN
Valid Data In
VOH
VOL
DOUT
Hi-Z
NOTE 1: Implementing WE at RAS time During a Read or Write Cycle is optional.
: “H” or “L”
Doing so will facilitate compatibility with future EDO DRAMs.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
75H3507
SA14-4343-00
Released 6/96
Page 11 of 22
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