IBM11D1475B IBM11D2475B
IBM11E1475B IBM11E2475B
1M/2M x 32 Desktop ECC-on-SIMM
Extended Data Out Mode Early Write Cycle
tRP
tRASP
VIH
tAR
RAS
VIL
tCRP
tHPC
tRCD
tCP
tCP
tRSH
tHCAS
tHCAS
tHCAS
VIH
VIL
CAS
tRAD
tCSH
tASC
tRAL
tCAH
tASR tRAH
tASC
tCAH
tASC
tCAH
VIH
VIL
Address
Row
Column 1
Column 2
Column N
tCWL
tRWL
tWCH
tWCH
tWRH
tWRP
tWCS
tWP
tWCS
tWP
tWCH
tWCS
VIH
VIL
tWP
WE
NOTE 1
tDHR
tDS
tDH
tDS
tDH
tDS
tDH
VIH
VIL
DIN
Data In 1
Data In 2
Data In N
NOTE 1: Implementing WE at RAS time During a Read or Write Cycle is optional.
: “H” or “L”
Doing so will facilitate compatibility with future EDO DRAMs.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
75H3507
SA14-4343-00
Released 6/96
Page 14 of 22
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