IBM11D1475B IBM11D2475B
IBM11E1475B IBM11E2475B
1M/2M x 32 Desktop ECC-on-SIMM
Extended Data Out Mode Read Cycle (WE Control)
tRP
tRASP
VIH
tAR
RAS
tCPRH
VIL
tCRP
tHPC
tRCD
tCP
tRSH
tCP
tHCAS
tHCAS
tHCAS
VIH
VIL
CAS
tCSH
tASC
tRAL
tASR tRAH
tASC
tCAH
tASC
tCAH
tCAH
VIH
VIL
Address
Row
Column 1
Column 2
Column N
tAA
tAA
tRAD
tRCH
tRRH
tRCH
tRCS tRCH
tRCS
tWRH
tWRP
tRCS
tWPZ
tWPZ
VIH
VIL
WE
NOTE 1
tCAC
tOFF
tCAC
tCPA
tCPA
tWHZ
tRAC
tAA
tWHZ
tCAC
tCLZ
VOH
VOL
DOUT
Hi-Z
Data Out 1
Data Out 2
Data Out N
NOTE 1: Implementing WE at RAS time During a Read or Write Cycle is optional.
: “H” or “L”
Doing so will facilitate compatibility with future EDO DRAMs.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
75H3507
SA14-4343-00
Released 6/96
Page 13 of 22
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