11
1Gbit (32Mx32bit) Mobile SDR Memory
H55S1G(2/3)2MFP Series
AC CHARACTERISTICS I (AC operating conditions unless otherwise noted)
166MHz
133MHz
105MHz
Parameter
CAS Latency=3
Symbol
Unit Note
Min Max Min Max Min Max
System Clock
Cycle Time
tCK3
tCK2
6.0
12
1000
1000
7.5
12
1000
1000
9.5
15
1000
1000
ns
ns
CAS Latency=2
Clock High Pulse Width
Clock Low Pulse Width
tCHW
tCLW
tAC3
tAC2
tOH
2.0
2.0
-
-
2.5
2.5
-
-
3.0
3.0
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
-
-
CAS Latency=3
CAS Latency=2
5.4
6.0
7.0
10
-
2, 3
2, 3
3
Access Time From Clock
-
6.0
-
8.0
-
Data-out Hold Time
Data-Input Setup Time
Data-Input Hold Time
Address Setup Time
Address Hold Time
CKE Setup Time
2.6
2.0
1.0
2.0
1.0
2.0
1.0
2.0
1.0
1.0
-
2.6
2.0
1.0
2.0
1.0
2.0
1.0
2.0
1.0
1.0
-
2.6
3.0
1.5
3.0
1.5
3.0
1.5
3.0
1.5
1.0
tDS
-
-
-
1
tDH
-
-
-
1
tAS
-
-
-
1
tAH
-
-
-
-
-
1
tCKS
tCKH
tCS
-
1
CKE Hold Time
-
-
-
1
Command Setup Time
Command Hold Time
-
-
-
1
tCH
-
-
-
1
CLK to Data Output in Low-Z Time
tOLZ
tOHZ3
tOHZ2
-
-
-
CAS Latency=3
CAS Latency=2
5.4
6.0
6.0
8.0
7.0
10
CLK to Data Output in
High-Z Time
Notes :
1. Assume tR / tF (input rise and fall time) is 1ns. If tR & tF > 1ns, then [(tR+tF)/2-1]ns should be added to the parameter.
2. Access time to be measured with input signals of 1V/ns edge rate, from 0.8V to 0.2V. If tR > 1ns, then (tR/2-0.5)ns
should be added to the parameter.
3. Output Load : 30pF+No termination
●
●
●
●
●
AC high level input voltage / low level input voltage : 1.6 / 0.2V
Input timing measurement reference level : 0.9V
Transition time (input rise and fall time) : 0.5ns
Output timing measurement reference level : 0.9V
Output load : CL = 30pF
tCK
Z = 50Ω
t
CH
tCL
Output
1.6V
0.9V
0.2V
CLK
30pF
tSETUP
tHOLD
1.6V
0.9V
0.2V
Input
Output Load
t
AC
tOH
Output
Rev 1.2 / Jun. 2008
12
HYNIX [ HYNIX SEMICONDUCTOR ]
