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1Gbit (32Mx32bit) Mobile SDR Memory
H55S1G(2/3)2MFP Series
FUNCTIONAL BLOCK DIAGRAM
8Mbit x 4banks x 32 I/O Mobile Synchronous DRAM
PASR
Extended
Mode
Register
Self refresh
logic & timer
Internal Row
Counter
8Mx32 BANK3
CLK
CKE
CS
8Mx32 BANK2
8Mx32 BANK1
8Mx32 BANK1
Row
Pre
Decoder
Row Active
DQ0
RAS
CAS
WE
Refresh
Memory
Cell
Array
32
Column Active
Column
Pre
Decoder
DQM0
~ 3
DQ31
Column decoders
Column Add
Counter
Bank Select
Address
Register
A0
A1
Burst
Counter
CAS
Latency
Amax
BA1
Mode Register
Data Out Control
BA0
Rev 1.2 / Jun. 2008
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