HT95LXXX
·
Location 000CH (Bank0)
specified data memory, and the higher-order byte to
TBLH (08H). For the HT95L400/40P, the instruction
²TABRDC [m]² is used for any page of any bank. Only
the destination of the lower-order byte in the table is
well-defined, and the higher-order byte of the table word
is transferred to TBLH. The table pointer (TBLP) or
(TBHP, TBLP for the HT95L400/40P) is a read/write
register (07H) or (1FH, 07H for the HT95L400/40P),
which indicates the table location. Before accessing the
table, the location must be placed in the (TBLP) or
(TBHP, TBLP for the HT95L400/40P). The TBLH is read
only and cannot be restored. If the main routine and the
ISR (Interrupt Service Routine) both employ the table
read instruction, the contents of the TBLH in the main
routine are likely to be changed by the table read in-
struction used in the ISR. Errors will then occur. Hence,
simultaneously using the table read instruction in the
main routine and the ISR should be avoided. However, if
the table read instruction has to be applied in both the
main routine and the ISR, the interrupt should be dis-
abled prior to the table read instruction. It will not be en-
abled until the TBLH has been backed-up. All table
related instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending on the requirements.
This location is reserved for the Timer/Event Counter
1 interrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, the
Timer/Event Counter 1 interrupt is enabled and the
stack is not full, the program begins execution at loca-
tion 000CH.
·
·
Location 0014H (Bank0)
This location is reserved for real time clock (RTC) in-
terrupt service program. When RTC generator is en-
abled and time-out occurs, the RTC interrupt is
enabled and the stack is not full, the program begins
execution at location 0014H.
Location 0018H (Bank0)
This location is reserved for the HKS pin edge transi-
tion or HDI pin falling edge transition or HFI pin rising
edge transition. If this condition occurs, the dialer I/O
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 18H.
Table Location
Any location in the ROM space can be used as look-up
tables. The instructions ²TABRDC [m]² (the current
page, one page=256 words) and ²TABRDL [m]² (the last
page) transfer the contents of the lower-order byte to the
HT95L400/40P
Table Location
Instruction(s)
*13
#5
1
*12
#4
1
*11
#3
1
*10
#2
1
*9
#1
1
*8
#0
1
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
TABRDL [m]
@7
@7
@6
@6
@5
@5
@4
@4
@3
@3
@2
@2
@1
@1
@0
@0
HT95L300/30P, HT95L200/20P
Table Location
Instruction(s)
*12
P12
1
*11
P11
1
*10
*9
*8
*7
*6
*5
@5
@5
*4
*3
*2
*1
*0
TABRDC [m]
TABRDL [m]
P10
1
P9
1
P8
1
@7
@7
@6
@6
@4
@4
@3
@3
@2
@2
@1
@1
@0
@0
HT95L100/10P, HT95L000/00P
Table Location
Instruction(s)
*11
P11
1
*10
P10
1
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
TABRDL [m]
P9
1
P8
1
@7
@7
@6
@6
@5
@5
@4
@4
@3
@3
@2
@2
@1
@1
@0
@0
Note: *13~*0: Table location bits
@7~@0: TBLP register bit7~bit0
#7~#0: TBHP register bit7~bit0
P12~P8: Current program counter bits
Rev. 1.20
10
May 26, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
