HT46R064G/065G/0662G
Enhanced A/D Type 8-Bit OTP MCU with OPA
6+2 PWM Mode
Each full PWM cycle, as it is controlled by an 8-bit PWM register, has 256 clock periods. However, in
the 6+2 PWM mode, each PWM cycle is subdivided into four individual sub-cycles known as
modulation cycle 0 ~ modulation cycle 3, denoted as i in the table. Each one of these four sub-cycles
contains 64 clock cycles. In this mode, a modulation frequency increase of four is achieved. The 8-bit
PWM register value, which represents the overall duty cycle of the PWM waveform, is divided into
two groups. The first group which consists of bit2~bit7 is denoted here as the DC value. The second
group which consists of bit0~bit1 is known as the AC value. In the 6+2 PWM mode, the duty cycle
value of each of the four modulation sub-cycles is shown in the following table.
Parameter
AC (0~3)
DC (Duty Cycle)
DC+1
64
i<AC
Modulation cycle i
(i=0~3)
DC
64
i³AC
6+2 Mode Modulation Cycle Values
The following diagram illustrates the waveforms associated with the 6+2 mode of PWM operation.
It is important to note how the single PWM cycle is subdivided into 4 individual modulation cycles,
numbered from 0~3 and how the AC value is related to the PWM value.
f
S
Y
S
[
[
[
[
P
P
P
P
W
W
W
W
M
M
M
M
]
]
]
]
=
=
=
=
1
1
1
1
0
0
0
0
0
1
2
3
P
P
P
P
W
W
W
W
M
M
M
M
2
5
/
6
4
2
2
2
2
5
5
6
6
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
2
5
5
5
6
/
/
/
/
6
6
6
6
4
4
4
4
2
5
/
6
4
2
2
2
2
5
6
6
6
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
6
6
6
/
/
/
6
6
6
4
4
4
2
2
2
5
5
5
/
/
/
6
6
6
4
4
4
P
W
M
m
o
d
u
l
a
S
t
Y
i
S
o
n
p
e
r
i
o
d
:
6
4
/
f
M
o
d
u
l
a
t
i
o
n
M
c
o
y
d
c
u
l
l
e
a
t
0
i
o
n
M
c
o
y
d
c
u
l
l
e
a
t
1
i
o
n
M
c
o
y
d
c
u
l
l
e
a
t
2
i
o
n
M
c
o
y
d
c
u
l
l
e
a
t
3
i
o
P
W
M
c
y
S
c
Y
l
S
e
:
2
5
6
/
f
6+2 PWM Mode
b
7
b
0
P
W
M
R
e
g
i
s
t
e
r
(
6
A
D
C
v
a
l
u
u
e
C
v
a
l
e
PWM Register for 6+2 Mode
Rev. 1.00
64
March 3, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
