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HT45R37-A(28SSOP-A) 参数 Datasheet PDF下载

HT45R37-A(28SSOP-A)图片预览
型号: HT45R37-A(28SSOP-A)
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, UVPROM, 12MHz, CMOS, PDSO28]
分类和应用: 可编程只读存储器LTE微控制器光电二极管
文件页数/大小: 100 页 / 666 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT45R37  
Timer/Event Counters  
The provision of timers form an important part of any  
microcontroller, giving the designer a means of carrying  
out time related functions. The device contains two 8-bit  
count-up timers. As each timer has three different oper-  
ating modes, they can be configured to operate as a  
general timer, an external event counter or as a pulse  
width measurement device. The provision of a prescaler  
to the clock circuitry of the 8-bit Timer/Event Counter  
also gives added range to this timer.  
preload register will be in an unknown condition. Note  
that if the Timer/Event Counter is switched off and data  
is written to its preload registers, this data will be imme-  
diately written into the actual timer registers. However, if  
the Timer/Event Counter is enabled and counting, any  
new data written into the preload data registers during  
this period will remain in the preload registers and will  
only be written into the timer registers the next time an  
overflow occurs.  
There are two types of registers related to the  
Timer/Event Counters. The first are the registers that  
contain the actual value of the Timer/Event Counter and  
into which an initial value can be preloaded. Reading  
from these registers retrieves the contents of the  
Timer/Event Counter. The second type of associated  
register is the Timer Control Register which defines the  
timer options and determines how the Timer/Event  
Counter is to be used. The Timer/Event Counters can  
have the their clock configured to come from an internal  
clock source. In addition, their clock source can also be  
configured to come from an external timer pin.  
Timer Control Registers - TMR0C, TMR1C  
The flexible features of the Holtek microcontroller  
Timer/Event Counters enable them to operate in three  
different modes, the options of which are determined by  
the contents of their respective control register.  
It is the Timer Control Register together with its corre-  
sponding timer registers that control the full operation of  
the Timer/Event Counters. Before the timers can be  
used, it is essential that the appropriate Timer Control  
Register is fully programmed with the right data to en-  
sure its correct operation, a process that is normally car-  
ried out during program initialisation.  
Configuring the Timer/Event Counter Input Clock  
Source  
To choose which of the three modes the timer is to oper-  
ate in, either in the timer mode, the event counting mode  
or the pulse width measurement mode, bits 7 and 6 of  
the corresponding Timer Control Register, which are  
known as the bit pair TnM1/TnM0, must be set to the re-  
quired logic levels. The timer-on bit, which is bit 4 of the  
Timer Control Register and known as TnON, depending  
upon which timer is used, provides the basic on/off con-  
trol of the respective timer. Setting the bit high allows the  
counter to run, clearing the bit stops the counter. For tim-  
ers that have prescalers, bits 0~2 of the Timer Control  
Register determine the division ratio of the input clock  
prescaler. The prescaler bit settings have no effect if an  
external clock source is used. If the timer is in the event  
count or pulse width measurement mode, the active  
transition edge level type is selected by the logic level of  
bit 3 of the Timer Control Register which is known as  
TnE.  
The internal timer¢s clock can originate from various  
sources. The system clock source is used when the  
Timer/Event Counter is in the timer mode or in the pulse  
width measurement mode. This internal clock source is  
fSYS which is also divided by a prescaler, the division ra-  
tio of which is conditioned by the Timer Control Register,  
TMRnC, bits TnPSC0~ TnPSC2.  
An external clock source is used when the timer is in the  
event counting mode, the clock source being provided  
on an external timer pin TMR0 or TMR1 depending  
upon which timer is used. Depending upon the condition  
of the TnE bit, each high to low, or low to high transition  
on the external timer pin will increment the counter by  
one.  
Timer Registers - TMR0, TMR1  
The timer registers are special function registers located in  
the Special Purpose Data Memory and is the place where  
the actual timer value is stored. These registers are known  
as TMR0 or TMR1. The value in the timer registers in-  
creases by one each time an internal clock pulse is re-  
ceived or an external transition occurs on the external  
timer pin. The timer will count from the initial value loaded  
by the preload register to the full count of FFH at which  
point the timer overflows and an internal interrupt signal is  
generated. The timer value will then be reset with the initial  
preload register value and continue counting.  
Configuring the Timer Mode  
In this mode, the Timer/Event Counter can be utilised to  
measure fixed time intervals, providing an internal inter-  
rupt signal each time the Timer/Event Counter over-  
flows. To operate in this mode, the Operating Mode  
Select bit pair, TnM1/TnM0, in the Timer Control Regis-  
ter must be set to the correct value as shown.  
Bit7 Bit6  
Control Register Operating Mode  
Select Bits for the Timer Mode  
1
0
In this mode the internal clock, fSYS , is used as the inter-  
nal clock for the Timer/Event Counter. However, the  
clock source, fSYS, for the 8-bit timer is further divided by  
To achieve a maximum full range count of FFH for the  
8-bit timer, the preload registers must first be cleared to  
all zeros. It should be noted that after power-on, the  
Rev. 1.20  
21  
February 25, 2011  
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