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HT45R04E 参数 Datasheet PDF下载

HT45R04E图片预览
型号: HT45R04E
PDF下载: 下载PDF文件 查看货源
内容描述: [适用于安防系列(烟感器、温感器、家用一 氧化碳测试器)等产品的 IC:HT45R04E。 工作电压:2.2V~5.5V ;工作频率:400Kz---2MHz(当fsys=455kHz时,VDD=+5V时 IDD<200uA) 1. 最多可有13 个双向输入/输出口 , 18-pin SOP 封装 2. 1 个与输入/输出口共用引脚的外部中断输入 3. 8 位可编程定时/计数器,具有溢出中断和7 级预分频器 4. 内置晶体和RC 振荡电路 5. 看门狗定时器 6. 1024×14Bits 程序存储器ROM 7. 64×8Bits 数据存储器RAM 8. 128×8Bits 数据存储器EEPROM,符合IIC通信协议(使用方法同24C01一致) 9. 具有PFD 功能,可以用来发声 10. HALT 和唤醒功能可降低功耗 11. 4 层硬件堆栈 12. 4 通道8 位解析度的A/D 转换器 13. 查表指令,表格内容字长14 位 14. 63 条指令,包含位操作指令 15. 指令执行时间为1 或2 个指令周期]
分类和应用: 晶体转换器预分频器计数器存储测试通信可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 43 页 / 2641 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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Preliminary  
HT45R04/HT45R04E  
·
Location 00CH  
Program Memory - ROM  
Location 00CH is reserved for the A/D converter inter-  
rupt service program. If an A/D converter interrupt re-  
sults from an end of A/D conversion, and if the  
interrupt is enabled and the stack is not full, the pro-  
gram begins execution at location 00CH.  
The program memory is used to store the program in-  
structions which are to be executed. It also contains  
data, table, and interrupt entries, and is organized into  
1024´14 bits, addressed by the program counter and ta-  
ble pointer.  
·
Table location  
Certain locations in the program memory are reserved  
for special usage:  
Any location in the program memory can be used as  
look-up tables. The instructions ²TABRDC [m]² (the  
current page, 1 page=256 words) and ²TABRDL [m]²  
(the last page) transfer the contents of the lower-order  
byte to the specified data memory, and the  
higher-order byte to TBLH (08H). Only the destination  
of the lower-order byte in the table is well-defined, the  
other bits of the table word are transferred to the lower  
portion of TBLH, and the remaining 2 bits are read as  
²0². The Table Higher-order byte register (TBLH) is  
read only. The table pointer (TBLP) is a read/write reg-  
ister (07H), which indicates the table location. Before  
accessing the table, the location must be placed in  
TBLP. The TBLH is read only and cannot be restored.  
If the main routine and the ISR (Interrupt Service Rou-  
tine) both employ the table read instruction, the con-  
tents of the TBLH in the main routine are likely to be  
changed by the table read instruction used in the ISR.  
Errors can occur. In other words, using the table read  
instruction in the main routine and the ISR simulta-  
neously should be avoided. However, if the table read  
instruction has to be applied in both the main routine  
and the ISR, the interrupt is supposed to be disabled  
prior to the table read instruction. It will not be enabled  
until the TBLH has been backed up. All table related  
instructions require two cycles to complete the opera-  
tion. These areas may function as normal program  
memory depending upon the requirements.  
·
Location 000H  
Location 000H is reserved for program initialization.  
After a chip reset, the program always begins execu-  
tion at location 000H.  
·
Location 004H  
Location 004H is reserved for the external interrupt  
service program. If the INT input pin is activated, the  
interrupt is enabled and the stack is not full, the pro-  
gram begins execution at location 004H.  
·
Location 008H  
Location 008H is reserved for the timer/event counter  
interrupt service program. If a timer interrupt results  
from a timer/event counter overflow, and if the inter-  
rupt is enabled and the stack is not full, the program  
begins execution at location 008H.  
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Stack Register - STACK  
This is a special part of the memory which is used to  
save the contents of the program counter only. The  
stack is organized into 4 levels and is neither part of the  
data nor part of the program space, and is neither read-  
able nor writable. The activated level is indexed by the  
stack pointer (SP) and is neither readable nor writeable.  
At a subroutine call or interrupt acknowledgment, the  
contents of the program counter are pushed onto the  
stack. At the end of a subroutine or an interrupt routine,  
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Program Memory  
Table Location  
Instruction  
*9  
P9  
1
*8  
P8  
1
*7  
*6  
*5  
*4  
*3  
*2  
*1  
*0  
TABRDC [m]  
TABRDL [m]  
@7  
@7  
@6  
@6  
@5  
@5  
@4  
@4  
@3  
@3  
@2  
@2  
@1  
@1  
@0  
@0  
Table Location  
P9, P8: Current program counter bits  
Note: *9~*0: Table location bits  
@7~@0: Table pointer bits  
Rev. 0.00  
8
December 30, 2004  
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