FLMCR:
EBR1:
EBR2:
TCSR:
.EQU
.EQU
.EQU
.EQU
H'FF80
H'FF82
H'FF83
H'FFA8
.ALIGN
MOV.B
MOV.B
2
#H'**,
ROH,
ROH
@EBR*:8
;
; Set EBR*
; #BLKSTR is top address of block to be erased.
; #BLKEND is last address of block to be erased.
MOV.W
MOV.W
ADDS
#BLKSTR, R0
#BLKEND, R2
; Top address of block to be erased
; Last address of block to be erased
; Last address of block to be erased + 1 → R2
#1,
R2
; Execute prewrite
MOV.W
PREWRT: MOV.B
MOV.W
PREWRS: INC
MOV.B
R0,
R3
R6L
R5
; Top address of block to be erased
; Prewrite-verify fail counter
; Set prewrite loop counter
; Prewrite-verify fail counter + 1 → R6L
;
#H'00,
#H'a,
R6L
#H'00
R1H,
R1H
@R3
MOV.B
; Write H'00
MOV.W
MOV.W
MOV.W
#H'A578, R4
;
R4,
@TCSR
R4
; Start watchdog timer
; Set prewrite loop counter
R5,
BSET
LOOPR1: SUBS
MOV.W
#0,
#1,
R4,
@FLMCR:8 ; Set P bit
R4
R4
;
;
BNE
BCLR
LOOPR1
#0,
; Wait loop
@FLMCR:8 ; Clear P bit
MOV.W
MOV.W
#H'A500, R4
;
R4,
@TCSR
; Stop watchdog timer
MOV.B
LOOPR2: DEC
BNE
#H'c,
R4H
LOOPR2
@R3,
PWVFOK
#H'32,
ABEND1
PREWRS
R4H
; Set prewrite-verify loop counter
;
; Wait loop
MOV.B
BEQ
CMP.B
BEQ
R1H
R6L
; Read data = H'00?
; If read data = H'00 branch to PWVFOK
; Prewrite-verify executed 50 times?
; If prewrite-verify executed 50 times, branch to ABEND1
; Prewrite again
BRA
ABEND1: Programming error
PWVFOK: ADDS
CMP.W
#1,
R2,
PREWRT
R3
R3
; Address + 1 → R3
; Last address?
; If not last address, prewrite next address
BNE
402
HITACHI [ HITACHI SEMICONDUCTOR ]
