Page
586
Item
21.12 Note on Switching
from F-ZTAT Version to
RAM Version
22. ROM
23.9. Clock Selection
Circuit
24.1.1 Register
Configuration
24.5.1 Module Stop Mode
25. Electrical
Characteristics
Revision (See Manual for Details)
Added
587 to 630
639
645
Added
Added
Table 24.3 Power-Down State Registers
Note 2 added
MSTP2 bit: Description amended
Note amended
Completely amended
Notes on TAS instruction added
654
663 to 774
All pages of
Appendix A
846, 847
B.2 Register Selection
Conditions
H8S/2134 Series H'FF83 SYSCR2 amended
H8S/2138 Series and H8S/2134 Series H'FF94, H'FF95
and H'FF98 to H'FF9D amended
Registers are amended
H'FEEB: ISR
H'FF86, H'FF87 : MSTPCRH/L
H'FF88, H'FFD8 : ICCR1/0
H'FFC4: SYSCR
H'FFC6: BCR
—
860
872
874
901
903
928 to 930
931
932 to 938
939 to 941
948 to 953
954 to 958
962, 963
B.3 Functions
C.2 Port 2 Block Diagrams Figure C.2, C.3, C.4 Port 2 Block Diagram amended
C.3 Port 3 Block Diagram
Figure C.5 Port 3 Block Diagram amended
C.4 Port 4 Block Diagrams Figure C.6, C.7, C.8, C.9, C.10, C.11, C.12 Port 4 Block
Diagram amended
C.5 Port 5 Block Diagrams Figure C.13, C.14, C.15 Port 5 Block Diagram amended
C.8 Port 8 Block Diagrams Figure C.23, C.24, C.25, C.26, C.27, C.28 Port 8 Block
Diagram amended
C.9 Port 9 Block Diagrams Figure C.29, C.30, C.31, C.33 Port 9 Block Diagram
amended
F. Product Code Lineup
Amendments due to introduction of the A-mask versions
(HD64F2138A, HD64F2134A)