HANBit
HDD128M72D18RPW
Address and Control Input hold time(Slow)
Data-out high impedence time from CK/CK
Data-out low impedence time from CK/CK
Input Slew Rate(for input only pins)
Input Slew Rate(for I/O pins)
tIH
tHZ
0.8
-0.7
-0.7
0.5
0.5
1.0
0.7
0.67
12
1.0
-0.75
-0.75
0.5
1.0
-0.75
-0.75
0.5
ns
ns
ns
ns
tCK
tCK
i, 6~9
+0.7
+0.7
+0.75
+0.75
+0.75
+0.75
1
1
t LZ
t SL(IO)
t SL(O)
t SL(O)
t SL(O)
t SLMR
tMRD
tDS
0.5
0.5
Output Slew Rate(x4,x8)
4.5
5
1.0
4.5
5
1.0
4.5
5
Output Slew Rate(x16)
0.7
0.7
Output Slew Rate Matching Ratio(rise to fall)
Mode register set cycle time
1.5
0.67
15
1.5
0.67
15
1.5
ns
ns
ns
ns
ns
ns
ns
tCK
ns
DQ & DM setup time to DQS
0.45
0.45
2.2
0.5
0.5
j, k
j, k
8
DQ & DM hold time to DQS
tDH
0.5
0.5
Control & Address input pulse width
DQ & DM input pulse width
tIPW
2.2
2.2
tDIPW
tPDEX
tXSNR
tXSRD
tREFI
1.75
6
1.75
7.5
1.75
7.5
8
Power down exit time
Exit self refresh to non-Read command
Exit self refresh to read command
Refresh interval time
75
75
75
200
200
200
7.8
tHP
7.8
tHP
7.8
tHP
4
Output DQS valid window
Clock half period
tQH
tHP
-
-
-
-
-
-
ns
ns
11
-tQHS
tCLmin or
tCHmin
-tQHS
tCLmin or
tCHmin
-tQHS
tCLmin or
tCHmin
10,11
Data hold skew factor
DQS write postamble time
Active to Read with Auto precharge
command
tQHS
0.55
0.6
0.75
0.6
0.75
0.6
ns
11
2
tWPST
0.4
0.4
0.4
tCK
tRAP
18
20
20
Autoprecharge write recovery +
Precharge time
(tWR/tCK)+
(tWR/tCK)+
(tWR/tCK)+
tDAL
tCK
13
(tRP/tCK
)
(tRP/tCK
)
(tRP/tCK)
Notes :
Maximum burst refresh of 8.
tHZQ transitions occurs in the same assess time windows as valid data transitions. These parameters are not referenced to a specific
voltage level, but specify when the device output is no longer driving.
The specific requirement is that DQS be valid(High-Low) on or before this CK edge. The case shown(DQS going from High_Z to logic Low)
applies when no writes were previously in progress on the bus. If a previous write was in progress, DQS could be High at this time,
depending on tDQSS.
The maximum limit for this parameter is not a device limit. The device will operate with a great value for this parameter, but system
performance (bus turnaround) will degrade accordingly.
URL : www.hbe.co.kr
8
HANBit Electronics Co.,Ltd.
REV 1.0 (January. 2005)