HANBit
HDD128M72D18RPW
Absolute Maximum Ratings
PARAMETER
SYMBOL
VIN, VOUT
VDD
RATING
UNTE
V
Voltage on any pin relative to Vss
Voltage on VDD supply relative to Vss
Voltage on VDDQ supply relative to Vss
Storage temperature
-0.5 ~ 3.6
-1.0 ~ 3.6
V
VDDQ
TSTG
-0.5 ~ 3.6
V
-55 ~ +150
1.5 * # of component
50
°C
W
Power dissipation
PD
Short circuit current
IOS
mA
Notes: Operation at above absolute maximum rating can adversely affect device reliability
DC operating conditions
(Recommended operating conditions (Voltage referenced to Vss = 0V, TA = 0 to 70°C) )
PARAMETER
SYMBOL
VDD
MIN
MAX
2.7
UNIT
V
NOTE
Supply Voltage
2.3
2.3
I/O Supply Voltage
VDDQ
2.7
V
I/O Reference Voltage
VREF
0.49*VDDQ
VREF – 0.04
VREF + 0.15
-0.3
0.51*VDDQ
VREF + 0.04
VREF + 0.3
VREF - 0.15
VDDQ + 0.3
VDDQ + 0.6
2
V
1
2
I/O Termination Voltage(system)
Input High Voltage
VTT
V
VIH (DC)
VIL (DC)
VIN (DC)
VID (DC)
I LI
V
Input Low Voltage
V
Input Voltage Level, CK and /CK inputs
Input Differential Voltage, CK and /CK inputs
Input leakage current
-0.3
V
0.3
V
-2
uA
uA
3
Output leakage current
I OZ
-5
5
Output High current (Normal strength driver)
; VOUT=VTT + 0.84V
I OH
I OL
I OH
-16.8
16.8
-9
mA
mA
mA
Output Low current (Normal strength driver)
; VOUT=VTT - 0.84V
Output High current (Half strength driver)
; VOUT=VTT + 0.45V
Notes :
1. Includes ± 25mV margin for DC offset on VREF, and a combined total of ± 50mV margin for all AC noise and DC offset on VREF, bandwidth
limited to 20MHz. The DRAM must accommodate DRAM current spikes on VREF and internal DRAM noise coupled to VREF, both of which
may result in VREF noise. VREF should be de-coupled with an inductance of ≤ 3nH.
2.VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF, and
must track variations in the DC level of VREF
3. VID is the magnitude of the difference between the input level on CK and the input level on /CK.
4. These parameters should be tested at the pin on actual components and may be checked at either the pin or the pad in simulation. The
AC and DC input specifications are relative to a VREF envelop that has been bandwidth limited to 200MHZ.
URL : www.hbe.co.kr
5
HANBit Electronics Co.,Ltd.
REV 1.0 (January. 2005)
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
