GL9701 PCI ExpressTM to PCI Bridge
5.1.4 Side-band WAKE_N
GL9701 supports two means to signal the platform to re-establish the power and reference clock while the
bridge is placed into D3hot state. One is Beacon, and the other is WAKE_N. WAKE_N.
WAKE_N is a side-band signal and is low active. Similar with Beacon, the bridge only outputs WAKE_N
when the bridge detects PME_N asserted by the device on the secondary PCI bus when the bridge is placed
into D3hot state.
5.1.5 Power Management System Messages
GL9701 supports all messages involved in the Power Management. GL9701 either initiates or receives them.
Table5-1 outlines their characteristics.
Packet
Type
DLLP
DLLP
DLLP
DLLP
PM_Enter_L1
PM_Enter_L23
PM_Active_State_Request_L1
PM_Request_Ack
PM_Active_State_Nak
PM_PME
TLP
TLP
TLP
TLP
PME_Turn_Off
PME_TO_Ack
5.2 PCI Clock Run
GL9701 supports Clock Run functionality specified in PCI Mobile Design Guide v1.1. CLKRUN_N is an
optional signal used by devices to request starting (or speeding up) the clock. A device requests the central
resource to start, speed up, or maintain the PCI clock by the assertion of CLKRUN_N. The central resource is
responsible for maintaining CLKRUN_N asserted, and for driving it high to the de-asserted state.
Clock Run functionality in GL9701 can be enabled by the asserting CLKRUN_N_EN (PIN69) to high. When
the function is enabled, GL9701 plays the role of central resource. There is a ODT inside the CLKRUN_N
(PIN68), so there is no need to add an external pull up resistor on the CLKRUN_N.
5.3 PCI Clock
GL9701 supports five PCI slots on the secondary PCI interface. To provide the devices on these slots and
GL9701 itself can work properly, GL9701 provides six PCI clock sources.
©2000-2006 Genesys Logic Inc. - All rights reserved.
Page 25
GENESYS [ GENESYS LOGIC ]
