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GL9701-MXG 参数 Datasheet PDF下载

GL9701-MXG图片预览
型号: GL9701-MXG
PDF下载: 下载PDF文件 查看货源
内容描述: PCI ExpressTM至PCI桥 [PCI ExpressTM to PCI Bridge]
分类和应用: 微控制器和处理器外围集成电路uCs集成电路uPs集成电路PC
文件页数/大小: 75 页 / 1051 K
品牌: GENESYS [ GENESYS LOGIC ]
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GL9701 PCI ExpressTM to PCI Bridge  
5.6 IDSEL Mapping  
While receiving a Type1 Configuration Cycle from the upstream PCI Express port, GL9701 will convert it  
into a Type0 Configuration Cycle if the bus number is within the range specified by the Primary Bus Number  
Register and the Secondary Bus Number Register.  
The format of a Type0 Configuration Cycle is as followed:  
GL9701 converts the destination ID device number to one of the AD[31:16] as the IDSEL of the five PCI slots.  
The mapping between the AD[31:16] and Device Number is:  
Device Number [4:0]  
AD[31:16]  
00000  
0000_0000_0000_0001  
00001  
00010  
00011  
0000_0000_0000_0010  
0000_0000_0000_0100  
0000_0000_0000_1000  
00100  
00101  
0000_0000_0001_0000  
0000_0000_0010_0000  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
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