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DS_FT313H 参数 Datasheet PDF下载

DS_FT313H图片预览
型号: DS_FT313H
PDF下载: 下载PDF文件 查看货源
内容描述: 该FT313H是一个高速通用串行总线( USB )主机控制器,通用串行总线规范2.0版兼容,并支持高达480M bit / s的数据传输速度。 [The FT313H is a Hi-Speed Universal Serial Bus (USB) Host Controller compatible with Universal Serial Bus Specification Rev 2.0 and supports data transfer speeds of up to 480M bit/s.]
分类和应用: 数据传输控制器
文件页数/大小: 64 页 / 1588 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Document No.: FT_000589  
FT313H USB2.0 HS Host Controller Datasheet Version 1.1  
Clearance No.: FTDI# 318  
Bit  
Name  
Type  
Default value  
Description  
Note1: This is further gated by MIN_WIDTH bits  
of EDGEINTC register if edge trigger interrupt is  
used.  
Note2: In the full-speed mode, these registers  
are reserved.  
[15:12]  
11  
Reserved  
RO  
4’b0  
-
Asynchronous Schedule Park Mode Enable  
ASYN_PK_EN  
R/W  
1’b1  
Software uses this register to enable or disable  
the Park mode. When this register is set to ‘1’,  
the Park mode is enabled.  
10  
Reserved  
RO  
1’b0  
-
Asynchronous Schedule Park Mode Count  
[9:8]  
ASYN_PK_CNT R/W  
2’b11  
This field contains a count for the number of  
successive transactions that the host controller  
is allowed to execute from a high-speed queue  
head on the asynchronous schedule.  
7
6
Reserved  
RO  
1’b0  
1’b0  
-
Interrupt on Asynchronous Advance  
Doorbell  
INT_OAAD  
R/W  
This bit is used as a doorbell by software to ring  
the host controller to issue an interrupt at the  
next advance of the asynchronous schedule.  
Asynchronous Schedule Enable  
5
ASCH_EN  
R/W  
1’b0  
This bit controls whether the host controller  
skips the processing of asynchronous schedule.  
0: Do not process the asynchronous schedule  
1: Use the ASYNCLISTADDR register to access  
the asynchronous schedule  
Periodic Schedule Enable  
4
PSCH_EN  
R/W  
1’b0  
This bit controls whether the host controller  
skips the processing of the periodic schedule.  
0: Do not process the periodic schedule  
1: Use the PERIODICKISTBASE register to  
access the periodic schedule  
Frame List Size  
[3:2]  
FRL_SIZE  
HC_RESET  
R/W  
R/W  
2’b00  
This field specifies the size of the frame list.  
00: 1024 elements (4096 bytes; default value)  
01: 512 elements (2048 bytes)  
10: 256 elements (1024 bytes)  
11: Reserved  
Host Controller Reset  
1
1’b0  
This control bit is used by the software to reset  
the host controller.  
Copyright © 2012 Future Technology Devices International Limited  
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