Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.1
Clearance No.: FTDI# 318
Address
Register
Reset value
Description
A4h
HCINTEN
0000h
Host controller interrupt enable register
USB testing register
50h
70h
74h
TESTMODE
0000 0000h
0000 0000h
0000 0000h
Test mode register
TESTPMSET1
Test parameter setting 1 register
Test parameter setting 2 register
TESTPMSET2
Table 5-1 Overview of host controller specific registers
5.2 EHCI operational registers
5.2.1 HCCAPLENGTH register (address = 00h)
This register is used as an offset to add to register base to find the beginning of the operational register
space. The high two bytes contain a BCD encoding of the EHCI revision number supported by this host
controller. The most signification byte of this register represents a major revision and the least
signification byte is the minor revision.
Bit
Name
Type
Default value
Description
Host Controller Interface Version Number
[31:16]
HCIVERSION
RO
16’h0100
This register is a 2-byte register containing a
BCD encoding of the EHCI revision number
supported by the host controller.
[15:8]
[7:0]
Reserved
RO
RO
8’h0
-
Capability Register Length
CAPLENGTH
8’h10
This register is used as an offset added to
register base to find out the beginning of the
Operational Register Space.
Table 5-2 Capability register
5.2.2 HCSPARAMS register (address = 04h)
This is a set of fields that are structural parameter: number of downstream ports, etc.
Bit
Name
Type
RO
Default value
28’h0
Description
[31:4]
[3:0]
Reserved
N_PORTS
-
Number of Ports
RO
4’h1
This field specifies the number of the physical
downstream ports implemented on the host
controller.
Table 5-3 Structural parameter register
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