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MPC8543EVUAQG 参数 Datasheet PDF下载

MPC8543EVUAQG图片预览
型号: MPC8543EVUAQG
PDF下载: 下载PDF文件 查看货源
内容描述: 的PowerQUICC ™III集成处理器硬件规格 [PowerQUICC™ III Integrated Processor Hardware Specifications]
分类和应用:
文件页数/大小: 144 页 / 1534 K
品牌: FREESCALE [ Freescale ]
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Serial RapidIO  
Table 59. Long Run Transmitter AC Timing Specifications—2.5 GBaud  
Range  
Characteristic  
Symbol  
Unit  
Notes  
Min  
Max  
Output voltage  
V
–0.40  
2.30  
V
Voltage relative to COMMON of either signal  
comprising a differential pair  
O
Differential output voltage  
Deterministic jitter  
Total jitter  
V
800  
1600  
0.17  
0.35  
1000  
mVp-p  
UI p-p  
UI p-p  
ps  
DIFFPP  
J
J
D
T
Multiple output skew  
S
Skew at the transmitter output between lanes of a  
multilane link  
MO  
Unit interval  
UI  
400  
400  
ps  
±100 ppm  
Table 60. Long Run Transmitter AC Timing Specifications—3.125 GBaud  
Range  
Characteristic  
Symbol  
Unit  
Notes  
Min  
Max  
Output voltage  
V
–0.40  
2.30  
V
Voltage relative to COMMON of either signal  
comprising a differential pair  
O
Differential output voltage  
Deterministic jitter  
Total jitter  
V
800  
1600  
0.17  
0.35  
1000  
mVp-p  
UI p-p  
UI p-p  
ps  
DIFFPP  
J
J
D
T
Multiple output skew  
S
Skew at the transmitter output between lanes of a  
multilane link  
MO  
Unit interval  
UI  
320  
320  
ps  
±100 ppm  
For each baud rate at which an LP-serial transmitter is specified to operate, the output eye pattern of the  
transmitter shall fall entirely within the unshaded portion of the transmitter output compliance mask shown  
in Figure 52 with the parameters specified in Table 61 when measured at the output pins of the device and  
the device is driving a 100-Ω ± 5% differential resistive load. The output eye pattern of an LP-serial  
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6  
Freescale Semiconductor  
81  
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