Serial RapidIO
transmitter that implements pre-emphasis (to equalize the link and reduce inter-symbol interference) need
only comply with the transmitter output compliance mask when pre-emphasis is disabled or minimized.
Transmitter Differential Output Voltage
V
DIFF
max
V
DIFF
min
0
–V
DIFF
min
–V
DIFF
max
0
A
B
Time in UI
1-B
1-A
1
Figure 52. Transmitter Output Compliance Mask
Table 61. Transmitter Differential Output Eye Diagram Parameters
Transmitter Type
1.25 GBaud short range
1.25 GBaud long range
2.5 GBaud short range
2.5 GBaud long range
3.125 GBaud short range
3.125 GBaud long range
V
DIFF
min (mV)
250
400
250
400
250
400
V
DIFF
max (mV)
500
800
500
800
500
800
A (UI)
0.175
0.175
0.175
0.175
0.175
0.175
B (UI)
0.39
0.39
0.39
0.39
0.39
0.39
17.7
Receiver Specifications
LP-serial receiver electrical and timing specifications are stated in the text and tables of this section.
Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode
return loss better than 6 dB from 100 MHz to (0.8)
×
(baud frequency). This includes contributions from
on-chip circuitry, the chip package, and any off-chip components related to the receiver. AC coupling
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6
82
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
