Local Bus
Table 41. Local Bus Timing Parameters (BV = 2.5 V)—PLL Enabled (continued)
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1
Parameter
Symbol
Min
Max
Unit
Notes
Local bus clock to output high Impedance (except LAD/LDP and LALE)
Local bus clock to output high impedance for LAD/LDP
Notes:
t
t
—
—
2.6
2.6
ns
ns
5
5
LBKHOZ1
LBKHOZ2
1. The symbols used for timing specifications follow the pattern of t
for
(first two letters of functional block)(signal)(state)(reference)(state)
inputs and t
for outputs. For example, t
symbolizes local bus
(first two letters of functional block)(reference)(state)(signal)(state)
LBIXKH1
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock reference (K) goes high (H), in this case for
LBK
clock one (1). Also, t
symbolizes local bus timing (LB) for the t
clock reference (K) to go high (H), with respect to
LBKHOX
LBK
the output (O) going invalid (X) or output hold time.
2. All timings are in reference to LSYNC_IN for PLL enabled and internal local bus clock for PLL bypass mode.
3. All signals are measured from BV /2 of the rising edge of LSYNC_IN for PLL enabled or internal local bus clock for PLL
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bypass mode to 0.4 × BV of the signal in question for 3.3-V signaling levels.
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4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
6. t
is a measurement of the minimum time between the negation of LALE and any change in LAD. t
is
LBOTOT
LBOTOT
programmed with the LBCR[AHD] parameter.
7. Maximum possible clock skew between a clock LCLK[m] and a relative clock LCLK[n]. Skew measured between
complementary signals at BV /2.
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8. Guaranteed by design.
Figure 22 provides the AC test load for the local bus.
Output
Z = 50 Ω
0
BV /2
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R = 50 Ω
L
Figure 22. Local Bus AC Test Load
NOTE
PLL bypass mode is required when LBIU frequency is at or below 83 MHz.
When LBIU operates above 83 MHz, LBIU PLL is recommended to be
enabled.
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6
44
Freescale Semiconductor
FREESCALE [ Freescale ]
