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MPC8572ELVTAULD 参数 Datasheet PDF下载

MPC8572ELVTAULD图片预览
型号: MPC8572ELVTAULD
PDF下载: 下载PDF文件 查看货源
内容描述: MPC8572E的PowerQUICC III集成处理器硬件规格 [MPC8572E PowerQUICC III Integrated Processor Hardware Specifications]
分类和应用: PC
文件页数/大小: 140 页 / 1412 K
品牌: FREESCALE [ Freescale ]
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Ethernet: Enhanced Three-Speed Ethernet (eTSEC)  
7.2  
DUART AC Electrical Specifications  
Table 21 provides the AC timing parameters for the DUART interface.  
Table 21. DUART AC Timing Specifications  
At recommended operating conditions with OVDD of 3.3V ± 5%.  
Parameter  
Value  
Unit  
Notes  
Minimum baud rate  
Maximum baud rate  
Oversample rate  
f
/1,048,576  
baud  
baud  
1, 2  
1, 2, 3  
1, 4  
CCB  
f
/16  
CCB  
16  
Notes:  
1. Guaranteed by design  
2. f  
refers to the internal platform clock frequency.  
CCB  
3. Actual attainable baud rate is limited by the latency of interrupt processing.  
th  
4. The middle of a start bit is detected as the 8 sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are  
th  
sampled each 16 sample.  
8 Ethernet: Enhanced Three-Speed Ethernet (eTSEC)  
This section provides the AC and DC electrical characteristics for the enhanced three-speed Ethernet  
controller.  
8.1  
Enhanced Three-Speed Ethernet Controller (eTSEC)  
(10/100/1000 Mbps)—FIFO/GMII/MII/TBI/RGMII/RTBI/RMII  
Electrical Characteristics  
The electrical characteristics specified here apply to all FIFO mode, gigabit media independent interface  
(GMII), media independent interface (MII), ten-bit interface (TBI), reduced gigabit media independent  
interface (RGMII), reduced ten-bit interface (RTBI), and reduced media independent interface (RMII)  
signals except management data input/output (MDIO) and management data clock (MDC), and serial  
gigabit media independent interface (SGMII). The RGMII, RTBI and FIFO mode interfaces are defined  
for 2.5 V, while the GMII, MII, RMII, and TBI interfaces can operate at both 2.5V and 3.3V.  
The GMII, MII, or TBI interface timing is compliant with IEEE 802.3. The RGMII and RTBI interfaces  
follow the Reduced Gigabit Media-Independent Interface (RGMII) Specification Version 1.3  
(12/10/2000). The RMII interface follows the RMII Consortium RMII Specification Version 1.2  
(3/20/1998).  
The electrical characteristics for MDIO and MDC are specified in Section 9, “Ethernet Management  
Interface Electrical Characteristics.”  
The electrical characteristics for SGMII is specified in Section 8.3, “SGMII Interface Electrical  
Characteristics.” The SGMII interface conforms (with exceptions) to the Serial-GMII Specification  
Version 1.8.  
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4  
28  
Freescale Semiconductor  
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