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MPC8572ELVTAULD 参数 Datasheet PDF下载

MPC8572ELVTAULD图片预览
型号: MPC8572ELVTAULD
PDF下载: 下载PDF文件 查看货源
内容描述: MPC8572E的PowerQUICC III集成处理器硬件规格 [MPC8572E PowerQUICC III Integrated Processor Hardware Specifications]
分类和应用: PC
文件页数/大小: 140 页 / 1412 K
品牌: FREESCALE [ Freescale ]
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DDR2 and DDR3 SDRAM Controller  
Figure 4 shows the DDR2 and DDR3 SDRAM Interface output timing for the MCK to MDQS skew  
measurement (tDDKHMH).  
MCK[n]  
MCK[n]  
tMCK  
t
s
DDKHMHmax) = 0.6 ns or 0.375 n  
MDQS  
t
DDKHMH(min) = –0.6 ns or -0.375 ns  
MDQS  
Figure 4. Timing Diagram for tDDKHMH  
Figure 5 shows the DDR2 and DDR3 SDRAM Interface output timing diagram.  
MCK[n]  
MCK[n]  
t
MCK  
t
,t  
DDKHAS DDKHCS  
t
,t  
DDKHAX DDKHCX  
ADDR/CMD  
Write A0  
NOOP  
t
DDKHMP  
t
DDKHMH  
MDQS[n]  
MDQ[x]  
t
DDKHME  
t
DDKHDS  
t
DDKLDS  
D0  
D1  
t
DDKLDX  
t
DDKHDX  
Figure 5. DDR2 and DDR3 SDRAM Interface Output Timing Diagram  
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4  
Freescale Semiconductor  
25  
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