Package Description
Table 75. MPC8572E Pinout Listing (continued)
Power
Notes
Signal
Signal Name
Package Pin Number Pin Type
Supply
LGPL2/LOE/LFRE
UPM General Purpose Line 2 / A27
Output Enable / Flash Read
Enable
O
BV
5, 8, 9
DD
LGPL3/LFWP
UPM General Purpose Line 3 / K16
Flash Write Protect
O
BV
BV
5, 9
—
DD
DD
LGPL4/LGTA/LUPWAIT/LPBSE UPM General Purpose Line 4 / L17
I/O
/LFRB
Target Ack / Wait / Parity Byte
Select / Flash Ready-Busy
LGPL5
UPM General Purpose Line 5 / B26
Amux
O
BV
5, 9
DD
LCLK[0:2]
Local Bus Clock
F17, F16, A23
O
I
BV
BV
BV
—
—
—
DD
DD
DD
LSYNC_IN
LSYNC_OUT
Local Bus DLL Synchronization B22
Local Bus DLL Synchronization A21
O
DMA
DMA1_DACK[0:1]
DMA2_DACK[0]
DMA1_DREQ[0:1]
DMA2_DREQ[0]
DMA1_DDONE[0:1]
DMA2_DDONE[0]
DMA2_DREQ[2]
DMA Acknowledge
DMA Acknowledge
DMA Request
DMA Request
DMA Done
W25, U30
O
O
I
OV
OV
OV
OV
OV
OV
BV
21
5, 9
—
DD
DD
DD
DD
DD
DD
DD
AA26
Y29, V27
V29
I
—
Y28, V30
AA28
O
O
I
5, 9
5, 9
—
DMA Done
DMA Request
M23
Programmable Interrupt Controller
UDE0
UDE1
Unconditional Debug Event
Processor 0
AC25
AA25
I
I
OV
OV
—
—
DD
DD
Unconditional Debug Event
Processor 1
MCP0
Machine Check Processor 0
Machine Check Processor 1
External Interrupts
M28
L28
I
I
I
OV
OV
OV
—
—
—
DD
DD
DD
MCP1
IRQ[0:11]
T24, R24, R25, R27,
R28, AB27, AB28, P27,
R30, AC28, R29, T31
IRQ_OUT
Interrupt Output
U24
O
OV
2, 4
DD
1588
TSEC_1588_CLK
Clock In
AM22
AM23
I
I
LV
LV
—
—
DD
DD
TSEC_1588_TRIG_IN
Trigger In
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
105
FREESCALE [ Freescale ]
