Document Revision History
Rev. No.
Table 61. Document Revision History (continued)
Substantive Change(s)
3.0
Table 1—Corrected MII management voltage reference
Section 2.1.3—New
Table 2—Corrected MII management voltage reference
Table 4—Added VDD power table
Table 5—Added AVDD power table
Table 7—New
Table 8—New
Table 9—New
Table 13—Added overshoot/undershoot note.
Figure 3—New
Table 16—Restated tMCKSKEW1 as tMCKSKEW, removed tMCKSKEW2; added speed-specific minimum values for
333, 266, and 200 MHz; updated tDDSHME values.
Updated chapter to reflect that GMII, MII and TBI can be run with 2.5V signalling.
Table 34—Added MDIO output valid timing
Table 36—Updated tLBIVKH1, tLBIXKH1, and tLBOTOT
.
Table 37—New
Table 19, Table 21, Table 23—Updated clock reference
Table 44—Updated tPCIVKH
Section 14.1— Changed minimum height from 2.22 to 3.07 and maximum from 2.76 to 3.75
Table 53.—Updated MII management voltage reference and added note 20.
Section 16.2.4.1—Changed θJC from 0.3 to 0.8; changed die-junction temperature from 67 to 71
Section 17.7—Added paragraph that begins “TSEC1_TXD[3:0]...”
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
98
Freescale Semiconductor
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