JTAG
provides the AC test load for TDO and the boundary-scan outputs of the MPC8540.
Output
Z
0
= 50
Ω
R
L
= 50
Ω
OV
DD
/2
Figure 24. AC Test Load for the JTAG Interface
provides the JTAG clock input timing diagram.
JTAG
External Clock
VM
t
JTKHKL
t
JTG
VM = Midpoint Voltage (OVDD/2)
VM
VM
t
JTGR
t
JTGF
Figure 25. JTAG Clock Input Timing Diagram
provides the TRST timing diagram.
TRST
VM
t
TRST
VM = Midpoint Voltage (OVDD/2)
VM
Figure 26. TRST Timing Diagram
provides the boundary-scan timing diagram.
JTAG
External Clock
VM
t
JTDVKH
t
JTDXKH
Boundary
Data Inputs
t
JTKLDV
t
JTKLDX
Boundary
Data Outputs
t
JTKLDZ
Boundary
Data Outputs
Output Data Valid
VM = Midpoint Voltage (OVDD/2)
Output Data Valid
Input
Data Valid
VM
Figure 27. Boundary-Scan Timing Diagram
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
47
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
