Local Bus
tLBKHKT
Internal launch/capture clock
T1
T2
T3
T4
LCLK
tLBKLOX1
tLBKLOV1
GPCM Mode Output Signals:
LCS[0:7]/LWE
tLBKLOZ1
tLBIVKH2
tLBIXKH2
UPM Mode Input Signal:
LUPWAIT
tLBIVKH1
tLBIXKH1
Input Signals:
LAD[0:31]/LDP[0:3]
(DLL Bypass Mode)
UPM Mode Output Signals:
LCS[0:7]/LBS[0:3]/LGPL[0:5]
Figure 23. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV] = 4 or 8 (DLL Bypass Mode)
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
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