Port Integration Module (S12PPIMV1)
2.3.54 Port J Polarity Select Register (PPSJ)
Address 0x026D
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
PPSJ7
PPSJ6
PPSJ2
PPSJ1
PPSJ0
Reset
0
0
0
0
0
0
0
0
Figure 2-52. Port J Polarity Select Register (PPSJ)
1. Read: Anytime
Write: Anytime
Table 2-48. PPSJ Register Field Descriptions
Description
Field
7-6, 2-0 Port J pull device select—Configure pull device and pin interrupt edge polarity on input pin
PPSJ
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 A pull-down device is selected; rising edge selected
0 A pull-up device is selected; falling edge selected
2.3.55 Port J Interrupt Enable Register (PIEJ)
Read: Anytime.
Address 0x026E
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
PIEJ7
PIEJ6
PIEJ2
PIEJ1
PIEJ0
Reset
0
0
0
0
0
0
0
0
Figure 2-53. Port J Interrupt Enable Register (PIEJ)
1. Read: Anytime
Write: Anytime
Table 2-49. PIEJ Register Field Descriptions
Description
Field
7-6, 2-0 Port J interrupt enable—
PIEJ This bit enables or disables on the edge sensitive pin interrupt on the associated pin.
1 Interrupt is enabled
0 Interrupt is disabled (interrupt flag masked)
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
95
FREESCALE [ Freescale ]
