Port Integration Module (S12PPIMV1)
2.3.48 PIM Reserved Registers
Address 0x0260-0x267
Access: User read(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-46. PIM Reserved Registers
1. Read: Always reads 0x00
Write: Unimplemented
2.3.49 Port J Data Register (PTJ)
Address 0x0268
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
PTJ7
PTJ6
PTJ2
PTJ1
PTJ0
Reset
0
0
0
0
0
0
0
0
Figure 2-47. Port J Data Register (PTJ)
1. Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Table 2-43. PTJ Register Field Descriptions
Field
Description
7-6, 2-0 Port J general purpose input/output data—Data Register, pin interrupt input/output
PTJ
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• Pin interrupts can be generated if enabled in input or output mode.
S12P-Family Reference Manual, Rev. 1.13
92
Freescale Semiconductor
FREESCALE [ Freescale ]
