Port Integration Module (S12PPIMV1)
2.3.52 Port J Reduced Drive Register (RDRJ)
Address 0x026B
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
RDRJ7
RDRJ6
RDRJ2
RDRJ1
RDRJ0
Reset
0
0
0
0
0
0
0
0
Figure 2-50. Port J Reduced Drive Register (RDRJ)
1. Read: Anytime
Write: Anytime
Table 2-46. RDRJ Register Field Descriptions
Description
Field
7-6, 2-0 Port J reduced drive—Select reduced drive for output pin
RDRJ
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
2.3.53 Port J Pull Device Enable Register (PERJ)
Address 0x026C
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
PERJ7
PERJ6
PERJ2
PERJ1
PERJ0
Reset
1
1
0
0
0
1
1
1
Figure 2-51. Port J Pull Device Enable Register (PERJ)
1. Read: Anytime
Write: Anytime
Table 2-47. PERJ Register Field Descriptions
Description
Field
7-6, 2-0 Port J pull device enable—Enable pull device on input pin
PERJ
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
S12P-Family Reference Manual, Rev. 1.13
94
Freescale Semiconductor
FREESCALE [ Freescale ]
