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MC908MR32CFUE 参数 Datasheet PDF下载

MC908MR32CFUE图片预览
型号: MC908MR32CFUE
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内容描述: [MC908MR32CFUE ]
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品牌: FREESCALE [ Freescale ]
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Timer Interface A (TIMA)  
Functional Description  
OVERFLOW  
OVERFLOW  
OVERFLOW  
PERIOD  
POLARITY = 1  
(ELSxA = 0)  
TCHx  
TCHx  
PULSE  
WIDTH  
POLARITY = 0  
(ELSxA = 1)  
OUTPUT  
COMPARE  
OUTPUT  
COMPARE  
OUTPUT  
COMPARE  
Figure 16-4. PWM Period and Pulse Width  
16.3.4.1 Unbuffered PWM Signal Generation  
Any output compare channel can generate unbuffered PWM pulses as described  
in 16.3.4 Pulse-Width Modulation (PWM). The pulses are unbuffered because  
changing the pulse width requires writing the new pulse width value over the value  
currently in the TIMA channel registers.  
An unsynchronized write to the TIMA channel registers to change a pulse width  
value could cause incorrect operation for up to two PWM periods. For example,  
writing a new value before the counter reaches the old value but after the counter  
reaches the new value prevents any compare during that PWM period. Also, using  
a TIMA overflow interrupt routine to write a new, smaller pulse width value may  
cause the compare to be missed. The TIMA may pass the new value before it is  
written to the TIMA channel registers.  
Use this method to synchronize unbuffered changes in the PWM pulse width on  
channel x:  
When changing to a shorter pulse width, enable channel x output compare  
interrupts and write the new value in the output compare interrupt routine.  
The output compare interrupt occurs at the end of the current pulse. The  
interrupt routine has until the end of the PWM period to write the new value.  
When changing to a longer pulse width, enable TIMA overflow interrupts and  
write the new value in the TIMA overflow interrupt routine. The TIMA  
overflow interrupt occurs at the end of the current PWM period. Writing a  
larger value in an output compare interrupt routine (at the end of the current  
pulse) could cause two output compares to occur in the same PWM period.  
NOTE:  
In PWM signal generation, do not program the PWM channel to toggle on output  
compare. Toggling on output compare prevents reliable 0 percent duty cycle  
generation and removes the ability of the channel to self-correct in the event of  
software error or noise. Toggling on output compare also can cause incorrect PWM  
signal generation when changing the PWM pulse width to a new, much larger  
value.  
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0  
MOTOROLA  
Data Sheet  
241  
Timer Interface A (TIMA)  
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