Serial Peripheral Interface Module (SPI)
Resetting the SPI
These sources in the SPI status and control register can generate CPU interrupt
requests:
•
SPI receiver full bit (SPRF) — The SPRF bit becomes set every time a byte
transfers from the shift register to the receive data register. If the SPI
receiver interrupt enable bit, SPRIE, is also set, SPRF can generate either
an SPI receiver/error or CPU interrupt.
•
SPI transmitter empty (SPTE) — The SPTE bit becomes set every time a
byte transfers from the transmit data register to the shift register. If the SPI
transmit interrupt enable bit, SPTIE, is also set, SPTE can generate either
an SPTE or CPU interrupt request.
15.8 Resetting the SPI
Any system reset completely resets the SPI. Partial resets occur whenever the SPI
enable bit (SPE) is low. Whenever SPE is low:
•
•
•
•
The SPTE flag is set.
Any transmission currently in progress is aborted.
The shift register is cleared.
The SPI state counter is cleared, making it ready for a new complete
transmission.
•
All the SPI port logic is defaulted back to being general-purpose I/O.
These items are reset only by a system reset:
•
•
•
All control bits in the SPCR
All control bits in the SPSCR (MODFEN, ERRIE, SPR1, and SPR0)
The status flags SPRF, OVRF, and MODF
By not resetting the control bits when SPE is low, the user can clear SPE between
transmissions without having to set all control bits again when SPE is set back high
for the next transmission.
By not resetting the SPRF, OVRF, and MODF flags, the user can still service these
interrupts after the SPI has been disabled. The user can disable the SPI by writing
0 to the SPE bit. The SPI can also be disabled by a mode fault occurring in an SPI
that was configured as a master with the MODFEN bit set.
15.9 Queuing Transmission Data
The double-buffered transmit data register allows a data byte to be queued
and transmitted. For an SPI configured as a master, a queued data byte is
transmitted immediately after the previous transmission has completed. The SPI
transmitter empty flag (SPTE) indicates when the transmit data buffer is ready to
accept new data. Write to the transmit data register only when the SPTE bit is high.
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
MOTOROLA Serial Peripheral Interface Module (SPI)
Data Sheet
223
FREESCALE [ Freescale ]
