Data Sheet — MC68HC908MR32 • MC68HC908MR16
Section 14. System Integration Module (SIM)
14.1 Introduction
This section describes the system integration module (SIM). Together with the
central processor unit (CPU), the SIM controls all microcontroller unit (MCU)
activities.
A block diagram of the SIM is shown in Figure 14-1.
The SIM is a system state controller that coordinates CPU and exception timing.
The SIM is responsible for:
•
Bus clock generation and control for CPU and peripherals:
–
–
Wait/reset/break entry and recovery
Internal clock control
•
•
Master reset control, including power-on reset (POR) and computer
operating properly (COP) timeout
Interrupt control:
–
–
–
Acknowledge timing
Arbitration control timing
Vector address generation
•
•
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Table 14-1 shows the internal signal names used in this section.
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
MOTOROLA System Integration Module (SIM)
Data Sheet
195
FREESCALE [ Freescale ]
