Serial Communications Interface Module (SCI)
TE — Transmitter Enable Bit
Setting this read/write bit begins the transmission by sending a preamble of 10
or 11 1s from the transmit shift register to the PTF5/TxD pin. If software clears
the TE bit, the transmitter completes any transmission in progress before the
PTF5/TxD returns to the idle condition (logic 1). Clearing and then setting TE
during a transmission queues an idle character to be sent after the character
currently being transmitted. Reset clears the TE bit.
1 = Transmitter enabled
0 = Transmitter disabled
NOTE:
NOTE:
Writing to the TE bit is not allowed when the enable SCI bit (ENSCI) is clear. ENSCI
is in SCI control register 1.
RE — Receiver Enable Bit
Setting this read/write bit enables the receiver. Clearing the RE bit disables the
receiver but does not affect receiver interrupt flag bits. Reset clears the RE bit.
1 = Receiver enabled
0 = Receiver disabled
Writing to the RE bit is not allowed when the enable SCI bit (ENSCI) is clear.
ENSCI is in SCI control register 1.
RWU — Receiver Wakeup Bit
This read/write bit puts the receiver in a standby state during which receiver
interrupts are disabled. The WAKE bit in SCC1 determines whether an idle input
or an address mark brings the receiver out of the standby state and clears the
RWU bit. Reset clears the RWU bit.
1 = Standby state
0 = Normal operation
SBK — Send Break Bit
Setting and then clearing this read/write bit transmits a break character followed
by a 1. The 1 after the break character guarantees recognition of a valid start
bit. If SBK remains set, the transmitter continuously transmits break characters
with no 1s between them. Reset clears the SBK bit.
1 = Transmit break characters
0 = No break characters being transmitted
NOTE:
Do not toggle the SBK bit immediately after setting the SCTE bit. Toggling SBK too
early causes the SCI to send a break character instead of a preamble.
Data Sheet
186
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Serial Communications Interface Module (SCI)
MOTOROLA