Pulse-Width Modulator for Motor Control (PWMMC)
DISX
SOFTWARE X DISABLE
CYCLE START
S
R
Q
BANK X
DISABLE
FMODE2
FAULT PIN 2 DISABLE
AUTO
MODE
FPIN2
LOGIC HIGH FOR FAULT
S
R
Q
TWO
ONE
SAMPLE
FILTER
S
R
Q
FFLAG2
SHOT
FAULT
PIN2
MANUAL
MODE
CLEAR BY WRITING 1 TO FTACK4
INTERRUPT REQUEST
FINT2
The example is of fault pin 2 with DISX. Fault pin 4 with DISY is logically similar and affects BANK Y disable.
Note: In manual mode (FMODE = 0), faults 2 and 4 may be cleared only if a logic level low at the input of the fault
pin is present.
CYCLE START
FMODE1
FAULT PIN 1 DISABLE
AUTO
MODE
FPIN1
LOGIC HIGH FOR FAULT
TWO
S
R
Q
BANK X DISABLE
ONE
SHOT
FAULT
PIN1
SAMPLE
FILTER
S
R
Q
FFLAG1
MANUAL
MODE
CLEAR BY WRITING 1 TO FTACK1
INTERRUPT REQUEST
FINT1
The example is of fault pin 1. Fault pin 3 is logically similar and affects BANK Y disable.
Note: In manual mode (FMODE = 0), faults 1 and 3 may be cleared regardless of the logic level at the input of the fault pin.
Figure 12-26. PWM Disabling Scheme
Data Sheet
150
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Pulse-Width Modulator for Motor Control (PWMMC) MOTOROLA