Freescale Semiconductor, Inc.
Memory Map
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$FE03
Read:
SIM Break Flag Control
BCFE
R
R
R
R
R
R
R
Register (SBFCR) Write:
See page 154.
Reset:
0
0
$FE09
$FE0B
Reserved
Read:
R
R
R
R
R
R
R
R
FLASH-1 Control Register
FDIV1
0
FDIV0
BLK1
BLK0
HVEN MARGIN ERASE
PGM
0
(FLCR1) Write:
See page 65.
Reset:
Read:
0
0
13
0
0
12
0
0
11
0
0
10
0
0
9
0
1
$FE0C
$FE0D
$FE0E
$FE0F
$FE11
$FE18
$FE19
$FE1A
Break Address Register High
Bit 15
0
14
Bit 8
0
(BRKH) Write:
See page 190.
Reset:
Read:
0
Break Address Register Low
Bit 7
0
6
0
5
4
3
2
Bit 0
(BRKL) Write:
See page 190.
Reset:
Read:
0
0
0
0
0
0
0
0
0
0
0
0
Break Status and Control
BRKE
BRKA
Register (BSCR) Write:
See page 189.
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Read: LVIOUT
LVI Status Register
(LVISR) Write:
See page 212.
Reset:
Read:
0
0
0
BLK1
0
0
BLK0
0
0
0
0
0
PGM
0
FLASH-2 Control Register
FDIV1
0
FDIV0
0
HVEN MARGIN ERASE
(FLCR2) Write:
See page 79.
Reset:
Read:
0
0
0
EEPROM-2 Non-volatile
EERA
CON2
CON1 EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0
Register (EENVR2) Write:
See page 110.
Reset:
Programmed value or 1 in the erased state.
0
Read:
0
EEPROM-2 Control Register
EEBCLK
EEOFF EERAS1 EERAS0 EELAT
EEPGM
(EECR2) Write:
See page 108.
Reset:
0
0
0
0
0
0
0
0
Reserved
R
R
R
R
R
R
R
R
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 8 of 9)
Technical Data
MC68HC908AS60 — Rev. 1.0
Memory Map
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