Freescale Semiconductor, Inc.
Memory Map
Input/Output Section
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$FE1B
Read: EERA
CON2
CON1 EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0
EEPROM-2 Array Control
Register (EEACR2) Write:
See page 110.
Reset:
EENVR2
$FE1C
$FE1D
Read:
EEPROM-1 Non-volatile
EERA
CON2
0
CON1 EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0
Register (EENVR1) Write:
See page 98.
Reset:
Programmed value or 1 in the erased state
0
Read:
EEPROM-1 Control Register
EEBCLK
EEOFF EERAS1 EERAS0 EELAT
EEPGM
(EECR1) Write:
See page 96.
Reset:
0
0
0
0
0
0
0
0
$FE1E
$FE1F
Reserved
R
R
R
R
R
R
R
R
Read: EERA
CON2
0
CON1 EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0
EENVR
EEPROM-1 Array Control
Register (EEACR1) Write:
See page 98.
Reset:
$FF80
$FF81
Read:
0
0
0
FLASH-1 Block Protect
BPR3
0
BPR2
0
BPR1
0
BPR0
0
Register (FLBPR1) Write:
See page 72.
Reset:
0
0
0
0
0
0
0
0
Read:
FLASH-2 Block Protect
BPR3
0
BPR2
0
BPR1
0
BPR0
0
Register (FLBPR2) Write:
See page 73.
Reset:
0
0
0
0
$FFFF
Read:
Low byte of reset vector
Clear COP counter
Unaffected by reset
COP Control Register
(COPCTL) Write:
See page 207.
Reset:
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 9 of 9)
MC68HC908AS60 — Rev. 1.0
Technical Data
Memory Map
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