Freescale Semiconductor, Inc.
Memory Map
Table 2-1. Vector Addresses
Address
$FFDA
$FFDB
$FFDC
$FFDD
$FFDE
$FFDF
$FFE0
$FFE1
$FFE2
$FFE3
$FFE4
$FFE5
$FFE6
$FFE7
$FFE8
$FFE9
$FFEA
$FFEB
$FFEC
$FFED
$FFEE
$FFEF
$FFF0
$FFF1
$FFF2
$FFF3
$FFF4
$FFF5
$FFF6
$FFF7
$FFF8
$FFF9
$FFFA
$FFFB
$FFFC
$FFFD
$FFFE
Vector
TIM vector (high)
TIM vector (low)
w
L
BDLC vector (high)
BDLC vector (low)
ADC vector (high)
ADC vector (low)
SCI transmit vector (high)
SCI transmit vector (low)
SCI receive vector (high)
SCI receive vector (low)
SCI error vector (high)
SCI error vector (low)
SPI transmit vector (high)
SPI transmit vector (low)
SPI receive vector (high)
SPI receive vector (low)
TIM A overflow vector (high)
TIM A overflow vector (low)
TIM A channel 5 vector (high)
TIM A channel 5 vector (low)
TIM A channel 4 vector (high)
TIM A channel 4 vector (low)
TIM A channel 3 vector (high)
TIM A channel 3 vector (low)
TIM A channel 2 vector (high)
TIM A channel 2 vector (low)
TIM A channel 1 vector (high)
TIM A channel 1vector (low)
TIM A channel 0 vector (high)
TIM A channel 0 vector (low)
PLL vector (high)
PLL vector (low)
IRQ1 vector (high)
IRQ1 vector (low)
SWI vector (high)
SWI vector (low)
Reset vector (high)
$FFFF
Reset vector (low)
Technical Data
MC68HC908AS60 — Rev. 1.0
Memory Map
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