Freescale Semiconductor, Inc.
Memory Map
Input/Output Section
Addr.
Register Name
Bit 7
6
TCIE
0
5
SCRIE
0
4
ILIE
0
3
TE
2
RE
0
1
Bit 0
SBK
0
$0014
Read:
SCI Control Register 2
SCTIE
RWU
0
(SCC2) Write:
See page 246.
Reset:
Read:
0
0
$0015
$0016
$0017
$0018
$0019
$001A
R8
SCI Control Register 3
T8
R
R
ORIE
NEIE
FEIE
PEIE
(SCC3) Write:
See page 248.
Reset:
U
U
0
0
0
0
0
0
Read: SCTE
TC
SCRF
IDLE
OR
NF
FE
PE
SCI Status Register 1
(SCS1) Write:
See page 250.
Reset:
Read:
1
1
0
0
0
0
0
0
BKF
RPF
SCI Status Register 2
(SCS2) Write:
See page 253.
Reset:
Read:
0
0
0
0
0
0
0
0
R7
T7
R6
T6
R5
T5
R4
T4
R3
T3
R2
T2
R1
T1
R0
T0
SCI Data Register
(SCDR) Write:
See page 254.
Reset:
Read:
Unaffected by reset
SCI Baud Rate Register
SCP1
SCP0
R
SCR2
SCR1
0
SCR0
0
(SCBR) Write:
See page 255.
Reset:
Read:
0
0
0
0
0
0
0
0
0
IRQF1
R
0
0
IRQ Status and Control
IMASK1 MODE1
Register (ISCR) Write:
See page 220.
R
0
R
0
R
0
R
0
ACK1
0
Reset:
0
0
1
0
1
$001B
$001C
Unimplemented
Read:
PLLF
1
1
PLL Control Register
PLLIE
0
PLLON
BCS
0
(PCTL) Write:
See page 169.
Reset:
0
1
ACQ
0
1
0
1
0
1
0
1
0
$001D
$001E
Read:
LOCK
PLL Bandwidth Control
AUTO
0
XLD
0
Register (PBWC) Write:
See page 171.
Reset:
0
MUL6
1
0
0
VRS6
1
0
VRS5
1
0
VRS4
0
Read:
PLL Programming Register
MUL7
0
MUL5
1
MUL4
VRS7
(PPG) Write:
See page 173.
Reset:
0
0
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 9)
MC68HC908AS60 — Rev. 1.0
Technical Data
Memory Map
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