Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
System initialization
3.5.2.2 INIT — RAM and I/O mapping register
State
bit 0
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1
on reset
RAM & I/O mapping (INIT)
$003D RAM3 RAM2 RAM1 RAM0 REG3 REG2 REG1 REG0 0000 0000
The internal registers used to control the operation of the MCU can be
relocated on 4k boundaries within the memory space with the use of
INIT. This 8-bit special-purpose register can change the default locations
of the RAM and control registers within the MCU memory map. It can be
written to only once within the first 64 E clock cycles after a reset. It then
becomes a read-only register.
RAM[3:0] — RAM map position
These four bits, which specify the upper hexadecimal digit of the RAM
address, control the position of the RAM in the memory map. The RAM
can be positioned at the beginning of any 4k page in the memory map.
Refer to Table 3-5.
REG[3:0] — 128-byte register block position
These four bits specify the upper hexadecimal digit of the address for the
128-byte block of internal registers. The register block is positioned at
the beginning of any 4k page in the memory map. Refer to Table 3-5.
MC68HC11P2 — Rev 1.0
Technical Data
Operating Modes and On-Chip Memory
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
