Signal Pins
Table 2-2 Signal and Package Information for the 144-Pin LQFP
State
Signal Name
D7
Pin No.
Type
During
Reset
Signal Description
28
Input/
Tri-stated
Data Bus — D7 - D14 specify part of the data for external program
Output
or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), D7 - D14 are tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
(GPIOF0)
Input/
Input
Port F GPIO — These eight GPIO pins can be individually
Output
programmed as input or output pins.
D8
(GPIOF1)
29
30
At reset, these pins default to Data Bus functionality.
D9
(GPIOF2)
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
D10
(GPIOF3)
32
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
D11
(GPIOF4)
133
134
135
136
137
D12
(GPIOF5)
D13
(GPIOF6)
D14
(GPIOF7)
D15
Input/
Output
Tri-stated
Input
Data Bus — D15 specifies part of the data for external program or
data memory accesses.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
(GPIOF8)
Input/
Port F GPIO — This GPIO pin can be individually programmed as
Output
an input or output pin.
At reset, this pin defaults to the data bus function.
To deactivate the internal pull-up resistor, set bit 8 in the
GPIOF_PUR register.
56F8366 Technical Data, Rev. 2.0
Freescale Semiconductor
Preliminary
23
FREESCALE [ Freescale ]
