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MC33989DW 参数 Datasheet PDF下载

MC33989DW图片预览
型号: MC33989DW
PDF下载: 下载PDF文件 查看货源
内容描述: 系统基础芯片,高速CAN收发器 [System Basis Chip with High-Speed CAN Transceiver]
分类和应用: 电信集成电路光电二极管
文件页数/大小: 66 页 / 2154 K
品牌: FREESCALE [ Freescale ]
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FUNCTIONAL DEVICE OPERATION  
RESET AND WATCHDOG PINS, SOFTWARE WATCHDOG OPERATIONS  
1. Mode 1  
In both modes reset is active at device power-up and  
wake-up.  
2. Mode 2 (also called Safe mode)  
• In mode 1–Reset is activated in case of VDD1 fall or  
watchdog not triggered. WD output is active low as soon  
as reset goes low. It remains low as long as the watchdog  
is not properly re-activated by the SPI.  
These modes are independent of the SBC modes  
(Normal, Standby, Sleep, and Stop). Modes 1 and 2 selection  
is achieved through the SPI (register MCR, bit SAFE). Default  
mode after reset is Mode 1.  
• In mode 2–(Safe mode) Reset is not activated in case of  
watchdog fault. WD output has the same behavior as in  
mode 1–The Watchdog output pin is a push-pull structure  
driving external components of the application for signal  
instance of an MCU wrong operation.  
Table 5 provides Reset and Watchdog output mode  
of operation. Two modes (modes 1 and 2) are available and  
can be selected through the SPI Safe bit. Default operation,  
after reset or power-up, is Mode 1.  
33989  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
23  
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