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DSPB56367AG150 参数 Datasheet PDF下载

DSPB56367AG150图片预览
型号: DSPB56367AG150
PDF下载: 下载PDF文件 查看货源
内容描述: 24位音频数字信号处理器 [24-Bit Audio Digital Signal Processor]
分类和应用: 外围集成电路数字信号处理器时钟
文件页数/大小: 100 页 / 1082 K
品牌: FREESCALE [ Freescale ]
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Serial Host Interface (SHI) I2C Protocol Timing  
Table 3-17 SHI I2C Protocol Timing (continued)  
Standard I2C  
Standard4, 5  
Fast-Mode5, 6  
Unit  
Symbol/  
Expression  
No.  
Characteristics1, 2, 3  
Min  
4.7  
4.0  
Max  
Min  
1.3  
1.3  
Max  
175 SCL low period  
176 SCL high period  
TLOW  
THIGH  
µs  
µs  
177 SCL and SDA rise time  
178 SCL and SDA fall time  
179 Data set-up time  
T
1000 20 + 0.1 × Cb 300  
300 20 + 0.1 × Cb 300  
ns  
R
T
F
ns  
TSU;DAT  
THD;DAT  
FDSP  
250  
0.0  
100  
0.0  
ns  
180 Data hold time  
0.9  
µs  
181 DSP clock frequency  
• Filters bypassed  
MHz  
10.6  
11.8  
13.1  
28.5  
39.7  
61.0  
• Narrow filters enabled  
• Wide filters enabled  
182 SCL low to data out valid  
183 Stop condition setup time  
TVD;DAT  
TSU;STO  
tSU;RQI  
3.4  
0.9  
µs  
µs  
ns  
4.0  
0.0  
0.6  
0.0  
184 HREQ in deassertion to last SCL edge (HREQ in set-up  
time)  
186 First SCL sampling edge to HREQ output deassertion2  
• Filters bypassed  
TNG;RQO  
ns  
ns  
ns  
ns  
2 × TC + 30  
2 × TC + 120  
2 × TC + 208  
50  
50  
• Narrow filters enabled  
140  
228  
140  
228  
• Wide filters enabled  
187 Last SCL edge to HREQ output not deasserted2  
• Filters bypassed  
TAS;RQO  
2 × TC + 30  
2 × TC + 80  
2 × TC + 135  
50  
50  
• Narrow filters enabled  
100  
155  
100  
155  
• Wide filters enabled  
188 HREQ in assertion to first SCL edge  
• Filters bypassed  
TAS;RQI  
4327  
4282  
4238  
927  
882  
838  
0.5 × TI2CCP  
0.5 × TC - 21  
-
• Narrow filters enabled  
• Wide filters enabled  
187 First SCL edge to HREQ in not asserted (HREQ in hold  
time.)  
tHO;RQI  
0.0  
0.0  
1
2
3
4
5
6
VCC = 1.8 V 5%; TJ = –40°C to +95°C, CL = 50 pF  
Pull-up resistor: RP (min) = 1.5 kOhm  
Capacitive load: Cb (max) = 400 pF  
It is recommended to enable the wide filters when operating in the I2C Standard Mode.  
The timing values are derived from frequencies not exceeding 100 MHz.  
It is recommended to enable the narrow filters when operating in the I2C Fast Mode.  
DSP56367 Technical Data, Rev. 2.1  
Freescale Semiconductor  
3-43  
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