Enhanced Serial Audio Interface Timing
Table 3-19 Enhanced Serial Audio Interface Timing1, 2 (continued)
No.
Characteristics3, 4, 5
Symbol
Expression
Min
Max Condition6 Unit
437 RXC rising edge to FSR out (wl) high
—
—
—
—
36.0
21.0
x ck
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
i ck a
438 RXC rising edge to FSR out (wl) low
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
37.0
22.0
x ck
i ck a
439 Data in setup time before RXC (SCK in synchronous
mode) falling edge
0.0
—
—
x ck
i ck
19.0
440 Data in hold time after RXC falling edge
441 FSR input (bl, wr) high before RXC falling edge8
442 FSR input (wl) high before RXC falling edge
443 FSR input hold time after RXC falling edge
444 Flags input setup before RXC falling edge
445 Flags input hold time after RXC falling edge
446 TXC rising edge to FST out (bl) high
447 TXC rising edge to FST out (bl) low
5.0
3.0
—
—
x ck
i ck
23.0
1.0
—
—
x ck
i ck a
23.0
1.0
—
—
x ck
i ck a
3.0
0.0
—
—
x ck
i ck a
0.0
—
—
x ck
19.0
i ck s
6.0
0.0
—
—
x ck
i ck s
—
—
29.0
15.0
x ck
i ck
—
—
31.0
17.0
x ck
i ck
448 TXC rising edge to FST out (wr) high8
449 TXC rising edge to FST out (wr) low8
450 TXC rising edge to FST out (wl) high
451 TXC rising edge to FST out (wl) low
—
—
31.0
17.0
x ck
i ck
—
—
33.0
19.0
x ck
i ck
—
—
30.0
16.0
x ck
i ck
—
—
31.0
17.0
x ck
i ck
452 TXC rising edge to data out enable from high
impedance
—
—
31.0
17.0
x ck
i ck
453 TXC rising edge to transmitter #0 drive enable
assertion
—
—
34.0
20.0
x ck
i ck
DSP56367 Technical Data, Rev. 2.1
3-46
Freescale Semiconductor
FREESCALE [ Freescale ]
