External Memory Expansion Port (Port A)
Table 3-11 DRAM Out-of-Page and Refresh Timings, Four Wait States1, 2 (continued)
20 MHz3 30 MHz3
No.
Characteristics
Symbol
Expression
Unit
Min
Max
—
Min
Max
—
165 RAS assertion to CAS deassertion
166 CAS assertion pulse width
tCSH
tCAS
tRCD
tRAD
tCRP
tCP
2.75 × TC − 4.0
1.25 × TC − 4.0
133.5
58.5
73.0
60.5
108.5
83.5
83.5
58.5
8.5
87.7
37.7
48.0
39.7
71.0
54.3
54.3
37.7
4.3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
—
167 RAS assertion to CAS assertion
168 RAS assertion to column address valid
169 CAS deassertion to RAS assertion
170 CAS deassertion pulse width
1.5 × TC
2
77.0
64.5
—
52.0
43.7
—
1.25 × TC
2
2.25 × TC − 4.0
1.75 × TC − 4.0
1.75 × TC − 4.0
1.25 × TC − 4.0
0.25 × TC − 4.0
1.75 × TC − 4.0
3.25 × TC − 4.0
2 × TC − 4.0
—
—
171 Row address valid to RAS assertion
172 RAS assertion to row address not valid
173 Column address valid to CAS assertion
174 CAS assertion to column address not valid
175 RAS assertion to column address not valid
176 Column address valid to RAS deassertion
177 WR deassertion to CAS assertion
178 CAS deassertion to WR assertion
179 RAS deassertion to WR assertion
180 CAS assertion to WR deassertion
181 RAS assertion to WR deassertion
182 WR assertion pulse width
tASR
tRAH
tASC
tCAH
tAR
—
—
—
—
—
—
83.5
158.5
96.0
71.2
33.8
8.8
—
54.3
104.3
62.7
46.2
21.3
4.6
—
—
—
tRAL
tRCS
tRCH
tRRH
tWCH
tWCR
tWP
—
—
1.5 × TC − 3.8
0.75 × TC − 3.7
0.25 × TC − 3.7
1.5 × TC − 4.2
3 × TC − 4.2
—
—
—
—
—
—
70.8
145.8
220.5
233.2
208.2
108.5
83.5
158.5
145.7
21.0
58.5
—
45.8
95.8
145.5
154.0
137.4
71.0
54.3
104.3
95.7
12.7
37.7
—
—
—
4.5 × TC − 4.5
4.75 × TC − 4.3
4.25 × TC − 4.3
2.25 × TC − 4.0
1.75 × TC − 4.0
3.25 × TC − 4.0
3 × TC − 4.3
—
—
183 WR assertion to RAS deassertion
184 WR assertion to CAS deassertion
185 Data valid to CAS assertion (write)
186 CAS assertion to data not valid (write)
187 RAS assertion to data not valid (write)
188 WR assertion to CAS assertion
tRWL
tCWL
tDS
—
—
—
—
—
—
tDH
—
—
tDHR
tWCS
tCSR
tRPC
—
—
—
—
189 CAS assertion to RAS assertion (refresh)
190 RAS deassertion to CAS assertion (refresh)
0.5 × TC − 4.0
1.25 × TC − 4.0
—
—
—
—
DSP56367 Technical Data, Rev. 2.1
3-22
Freescale Semiconductor
FREESCALE [ Freescale ]
