Freescale Semiconductor, Inc.
Technical Data — MC68HC912DG128
Section 16. Analog-to-Digital Converter
16.1 Contents
16.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .297
16.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .298
16.4 ATD Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .299
16.5 ATD Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .310
16.2 Introduction
The MC68HC912DG128 has two identical ATD modules identified as
ATD0 and ATD1. Except for the VDDA and VSSA Analog supply voltage,
all pins are duplicated and indexed with ‘0’ or ‘1’ in the following
description. An ‘x’ indicates either ‘0’ or ‘1’.
The ATD module is an 8-channel, 10-bit or 8-bit, multiplexed-input
successive-approximation analog-to-digital converter. It does not
require external sample and hold circuits because of the type of charge
redistribution technique used. The ATD converter timing can be
synchronized to the system P clock. The ATD module consists of a 16-
word (32-byte) memory-mapped control register block used for control,
testing and configuration.
MC68HC912DG128 — Rev 3.0
Technical Data
Analog-to-Digital Converter
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