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68HC705SB7 参数 Datasheet PDF下载

68HC705SB7图片预览
型号: 68HC705SB7
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 170 页 / 1982 K
品牌: FREESCALE [ Freescale ]
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August 27, 1998  
GENERAL RELEASE SPECIFICATION  
10.7 TIMER OPERATION DURING WAIT MODE  
During WAIT mode the 16-bit timer continues to operate normally and may gener-  
ate an interrupt to trigger the MCU out of the WAIT mode.  
10.8 TIMER OPERATION DURING STOP MODE  
When the MCU enters the STOP mode the free-running counter stops counting  
(the internal processor clock is stopped). It remains at that particular count value  
until the STOP mode is exited by applying a low signal to the IRQ pin, at which  
time the counter resumes from its stopped value as if nothing had happened. If  
STOP mode is exited via an external reset (logic low applied to the RESET pin)  
the counter is forced to $FFFC.  
If a valid input capture edge occurs at the PB1/TCAP pin during the STOP mode  
the input capture detect circuitry will be armed. This action does not set any flags  
or “wake up” the MCU, but when the MCU does “wake up” there will be an active  
input capture flag (and data) from the first valid edge. If the STOP mode is exited  
by an external reset, no input capture flag or data will be present even if a valid  
input capture edge was detected during the STOP mode.  
MC68HC05SB7  
REV 2.1  
16-BIT TIMER  
MOTOROLA  
10-11