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68HC705SB7 参数 Datasheet PDF下载

68HC705SB7图片预览
型号: 68HC705SB7
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 170 页 / 1982 K
品牌: FREESCALE [ Freescale ]
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GENERAL RELEASE SPECIFICATION  
August 27, 1998  
OLVL - OUTPUT COMPARE OUTPUT LEVEL SELECT  
The state of this read/write bit determines whether a logic one or a logic zero  
appears on the TCMP when a successful output compare occurs. Reset clears  
the OLVL bit.  
1 = TCMP goes high on output compare.  
0 = TCMP goes low on output compare.  
10.6 TIMER STATUS REGISTER (TSR)  
The timer status register (TSR) shown in Figure 10-13 contains flags for the fol-  
lowing events:  
An active signal on the PB1/TCAP pin or the CPF flag bit of voltage  
comparator in the analog subsystem, transferring the contents of the  
timer registers to the input capture registers.  
A match between the 16-bit counter and the output compare registers,  
transferring the OLVL bit to the TCMP.  
An overflow of the timer registers from $FFFF to $0000.  
Writing to any of the bits in the TSR has no effect. Reset does not change the  
state of any of the flag bits in the TSR.  
BIT 7  
ICF  
BIT 6  
OCF  
BIT 5  
TOF  
BIT 4  
0
BIT 3  
0
BIT 2  
0
BIT 1  
0
BIT 0  
0
TSR  
R
$0013  
W
reset:  
U
U
U
0
0
0
0
0
U = UNAFFECTED BY RESET  
Figure 10-13. Timer Status Registers (TSR)  
ICF - INPUT CAPTURE FLAG  
The ICF bit is automatically set when an edge of the selected polarity occurs on  
the PB1/TCAP pin. Clear the ICF bit by reading the timer status register with  
the ICF set, and then reading the low byte (ICRL, $0015) of the input capture  
registers. Reset has no effect on ICF.  
OCF - OUTPUT COMPARE FLAG  
The OCF bit is automatically set when the value of the timer registers matches  
the contents of the output compare registers. Clear the OCF bit by reading the  
timer status register with the OCF set, and then accessing the low byte (OCRL,  
$0017) of the output compare registers. Reset has no effect on OCF.  
TOF - TIMER OVERFLOW FLAG  
The TOF bit is automatically set when the 16-bit timer counter rolls over from  
$FFFF to $0000. Clear the TOF bit by reading the timer status register with the  
TOF set, and then accessing the low byte (TMRL, $0019) of the timer registers.  
Reset has no effect on TOF.  
MOTOROLA  
10-10  
16-BIT TIMER  
MC68HC05SB7  
REV 2.1